An active matrix liquid crystal display device generally includes a substrate on which a thin film transistor (hereinafter abbreviated as a TFT) is formed as a switching element for each pixel (hereinafter referred to as a TFT substrate), a counter substrate on which a counter electrode, a color filter, and the like are formed, and a liquid crystal layer disposed between the TFT substrate and the counter substrate. The TFT substrate is also used in another type of active matrix display device such as an organic EL display device.
For example, on a TFT substrate of a liquid crystal display device, a plurality of source lines, a plurality of gate lines, a plurality of TFTs respectively arranged in crossing portions of the lines, pixel electrodes, storage capacitor lines, storage capacitor electrodes, and the like are formed. In an end portion of the TFT substrate, terminals for respectively connecting the source lines and the gate lines to input terminals of a driving circuit are provided.
The configuration of the TFT substrate is disclosed in Patent Document No. 1, for example. Hereinafter, with reference to the drawings, the configuration of the TFT substrate of a liquid crystal display device disclosed in Patent Document No. 1 will be exemplarily described.
FIG. 17(a) is a schematic plan view generally showing the TFT substrate, and FIG. 17(b) is an enlarged plan view showing one pixel in the TFT substrate. FIG. 18 is a sectional view of a TFT and a terminal on the TFT substrate shown in FIG. 17.
As shown in FIG. 17(a), the TFT substrate includes a plurality of gate lines 2016 and a plurality of source lines 2017. Each region 2021 surrounded by these lines 2016 and 2017 functions as “a pixel”. In an area 2040 of the TFT substrate positioned in an outer edge portion of an area in which the pixels are formed (a display area), a plurality of connecting portion 2041 for connecting the plurality of gate lines 2016 and the plurality of source lines 2017 to the driving circuit, respectively, are arranged. Respective connecting portions 2041 constitute a terminal for the connection to an external wiring. In this specification, the area of the TFT substrate in which the plurality of terminals are arranged is referred to as “a terminal area”.
As shown in FIG. 17(b) and FIG. 18, a pixel electrode 2020 is provided in each region 2021 functioning as a pixel. In addition, in each region 2021, a TFT is formed. The TFT has a gate electrode G, gate insulating films 2025 and 2026 which cover the gate electrode G, a semiconductor layer 2019 disposed on the gate insulating film 2026, and a source electrode S and a drain electrode D connected to respective end portions of the semiconductor layer 2019. The TFT is covered with a passivation film 2028. Between the passivation film 2028 and the pixel electrode 2020, an interlayer insulating film 2029 is formed. The source electrode S of the TFT is connected to the source line 2017, and the gate electrode G is connected to the gate line 2016. The drain electrode D is connected to the pixel electrode 2020 in a contact hole 2030.
A storage capacitor line 2018 is formed in parallel to the gate line 2016. The storage capacitor line 2018 is connected to a storage capacitor. Herein, the storage capacitor is constituted by a storage capacitor electrode 2018b which is formed by the same conductive film as that of the drain electrode, a storage capacitor electrode 2018a formed by the same conductive film as that of the gate line, and a gate insulating film 2026 positioned therebetween.
For example, on the connecting portion 2041 extending from the gate line 2016, the gate insulating films 2025 and 2026 and the passivation film 2028 are not formed. A connecting line 2044 is formed so as to be in contact with the upper surface of the connecting portion 2041. Accordingly, electrical connection between the connecting portion 2041 and the connecting line 2044 is ensured.
As shown in FIG. 18, the TFT substrate of the liquid crystal display device is arranged so as to be opposed to a substrate 2014 on which a counter electrode and a color filter are formed with a liquid crystal layer 2015 interposed therebetween.
When such a TFT substrate is to be produced, it is preferred that a region 2021 which functions as a pixel (also referred to as “a pixel portion”) and a terminal may be formed by a common process, thereby suppressing the increase in number of masks and process steps.
In order to form a terminal portion of the TFT substrate shown in FIG. 18, after removing the gate insulating films (the gate insulating film may sometimes have a single-layer structure) 2025 and 2026 which cover the connecting portion 2041 formed by the same conductive layer as that of the gate electrode, and the passivation film 2028, it is necessary to form a connecting line 2044 by the same transparent conductive layer as that of the pixel electrode. Patent Document No. 2 discloses a method in which an interlayer insulating film 2029 is utilized as an etching mask in the etching for removing the gate insulating films (the gate insulating film may sometimes have a single-layer structure) 2025 and 2026 and the passivation film 2028.
On the other hand, in recent years, it is suggested that an active layer of the TFT be formed by using an oxide semiconductor film such as zinc oxide, instead of the silicon semiconductor film. Such a TFT is referred to as “an oxide semiconductor TFT”. The oxide semiconductor has higher mobility than amorphous silicon. For this reason, the oxide semiconductor TFT can operate at higher speed than an amorphous silicon TFT. In addition, the oxide semiconductor TFT has such advantages that it can be produced by the same process as that of the amorphous silicon TFT, and that it can be applied to a display device with larger screen size than a TFT utilizing polycrystalline silicon (see Patent Document No. 3, for example).